Turning to FIG. 1 of the drawings, an example of a conventional blixer 100 can be seen. A blixer (i.e., 100) is circuit that combines a balun, low-noise amplifier (LNA) and an I/Q mixer. As shown, blixer 100 generally comprises a balun-LNA core (which generally comprises NMOS transistors Q1 and Q2, inductor L, capacitor C1, and resistor R1) coupled to a switching quad or switching core (which generally comprises NMOS transistors Q3 through Q6 and resistor-capacitor (RC) networks 102-1 and 102-2). In operation, an RF input signal is provided to the balun-LNA core (which also receives bias voltages VBIAS1 and VBIAS2). Since transistors Q2 is n-times the size of transistor Q1, the transconductance gm2 of transistor Q2 is n-times the transconductance gm1 of transistor Q1 (or gm2=n*gm1). The signals from balun-LNA core (which are gm1*VIN and gm2*VIN) are applied to low impedance nodes of the switching core so as to be mixed with a differential local oscillator signal LOP and LOM. In order to achieve the desired intermediate frequency signals IFP and IFM, transistors Q4 and Q5 are n-times the side of transistors Q3 and Q6. Additionally, each RC network 104-1 through 104-4 has an impedance Z2 that is 1-nth the impedance Z1 of each of RC networks 102-1 and 102-2 (or Z2=Z1/n). This blixer 100, however, can be noisy, and due to the stacking of the transistors Q1-Q6, the amount of head room available for signal swing can be severely limited, limiting achievable gain. Additionally, this headroom limitation due to the supply voltage also limits the linearity blixer 100. Thus, there is however a desire to improve the linearity and reduce the noise of this blixer 100.
An example of a conventional blixer is Blaakmeer et al., “The BLIXER, a wideband balun-LNA-I/Q-mixer topology,” IEEE J. Solid-State Circuits, vol. 43, no. 12, pp. 2706-2715, December 2008.